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Xilinx Full-Toolchain Skill for AI Coding Assistants
Let AI handle the tedious Tcl scripting. You focus on the architecture.
An AI coding skill (Claude Code / Codex / OpenClaw) that turns natural language into production-ready Vivado / Vitis HLS / Vitis Unified / PetaLinux scripts. Describe what you want to build, and get runnable Tcl, XDC, shell scripts, and C/C++ templates -- covering the complete FPGA/MPSoC design flow from HLS algorithm to boot image.
Recommended MCP Servers
This skill works best when paired with the following MCP servers, which give AI direct control over Xilinx tools and infrastructure:
| MCP Server | Description |
|---|
| vivado-mcp | AI-driven Vivado session control -- synthesis, timing reports, CRITICAL WARNING diagnosis, device programming |
| vitis_mcp | AI-driven Vitis control -- end-to-end embedded software automation |
| ssh-mcp | SSH into VMs to run PetaLinux builds -- supports sudo and timeout protection |
| vmware-mcp | VMware Workstation Pro VM control -- manage PetaLinux build VMs |
Why This Skill?
| Pain Point | How This Skill Helps |
|---|
| Vivado Tcl API changes across versions | Reference docs pin version-specific APIs; the skill picks the right one |
| PS configuration is 200+ parameters | Guided questionnaire + validated Tcl templates for DDR/MIO/clocks |
| XDC constraint syntax is error-prone | Generates correct set_property / create_clock from plain descriptions |
| Cross-tool handoff is confusing | Automates HLS IP -> Vivado -> XSA -> Vitis/PetaLinux data flow |
| JESD204B -> 204C migration is risky | Step-by-step migration guide with port mapping and register diffs |
Supported Tools & Devices
Vitis HLS ──> Vivado ──> Vitis Unified / PetaLinux
C/C++ IP Hardware Bare-metal / RTOS / Linux
Tools: Vivado, Vitis HLS, Vitis Unified IDE (2022.x+), PetaLinux
Devices: Zynq UltraScale+ MPSoC (ZU15EG, ZU19EG, ZCU104 ...), Virtex UltraScale+ (VU9P), Kintex UltraScale, 7-Series, Versal
Installation
Claude Code (Recommended)
This repo is a Claude Code Plugin Marketplace. Install with one command:
/plugin marketplace add QingquanYao/xilinx-skill
Then install the plugin:
/plugin install xilinx-suite
That's it. The skill is ready to use.
OpenAI Codex CLI
git clone https://github.com/QingquanYao/xilinx-skill.git
cd xilinx-skill && bash install.sh # macOS/Linux
cd xilinx-skill; .\install.ps1 # Windows PowerShell
Or manually:
mkdir -p ~/.agents/skills/xilinx-suite
cp plugins/xilinx-suite/skills/xilinx-suite/SKILL.md ~/.agents/skills/xilinx-suite/
cp -r plugins/xilinx-suite/references ~/.agents/skills/xilinx-suite/
cp AGENTS.md ~/.codex/AGENTS.md
OpenClaw
git clone https://github.com/QingquanYao/xilinx-skill.git
cd xilinx-skill && bash install.sh # macOS/Linux
cd xilinx-skill; .\install.ps1 # Windows PowerShell
Or manually:
mkdir -p ~/.openclaw/skills/xilinx-suite
cp plugins/xilinx-suite/skills/xilinx-suite/SKILL.md ~/.openclaw/skills/xilinx-suite/
cp -r plugins/xilinx-suite/references ~/.openclaw/skills/xilinx-suite/
Compatibility
| Tool | Install Method | Format |
|---|
| Claude Code | /plugin marketplace add (native) | Plugin Marketplace |
| OpenAI Codex | install.sh / manual copy | SKILL.md + AGENTS.md |
| OpenClaw | install.sh / manual copy | SKILL.md |
All three tools follow the Agent Skills open standard.
Usage
Just describe your task in natural language. Examples:
> Create a Vivado project for ZCU104 with Zynq PS, 2 AXI GPIO and 1 BRAM controller
> Generate XDC constraints for a 200MHz system clock on VU9P with LVDS IO standard
> Build a PetaLinux image from my XSA with custom device tree overlay
> Migrate my JESD204B DAC interface to JESD204C on ZU19EG
> Create a Vitis HLS IP for matrix multiplication with AXI4-Stream interface
The skill will: