By JITx-Inc
Automate hardware design workflows with JITX: generate component models from datasheets, wire up circuits, author PCB layouts, apply signal integrity constraints, and manage mechanical CAD interchange — all from Python code.
This skill should be used when the user asks to "wire up", "connect", "build a circuit", create an "application circuit", work with passives (resistors, capacitors), set up power connections, "add pours", or "place components". Covers the Circuit class, net operators, passive queries, voltage dividers, and copper geometry. For provide/require pin assignment patterns, use jitx-pin-assignment instead.
Same-model self-critique pass for JITX Python code just written in this workspace. Use when the user asks to "review my JITX code", "self-critique", "check JITX conventions", "find string-hacking", "check framework-boundary issues", "audit before merge", or any equivalent. Mandatory for complete-board tier at task acceptance (folds into Think Twice); user-invoked for single-task work. Catches the architectural failure modes that grep gates and static linters miss — parallel string-keyed models, reflection-as-iteration (regardless of whether on self), owner-shaped data misplaced in design code, build-spec-then-iterate, module-import-time parallel models, and framework-boundary-bypass (the "framework does it, therefore so can I" trap). Applies an ownership test to every banned-pattern hit or proposed exception. Produces severity-tagged findings (CRITICAL / WARNING / NOTE) that fold into the task acceptance block.
Create JITX Python component code from datasheets, KiCad footprints, or user specifications. ALWAYS use this skill when user asks to "create a component", "model a part", "generate a component", "add a component", or "make a JITX component" - even without a datasheet. Also triggers on part numbers (NE555, LM1117, RP2040, etc.) and package types (SOIC, QFN, BGA, SON, SOT). Supports user-provided data, JITX generators for standard packages, and optional LCSC/EasyEDA fallback for non-standard footprints. Supports multi-unit symbols, thermal pads, and complex pin mappings.
Use when the user asks about topology using the double-greater-than operator, timing constraints, skew matching, insertion loss limits, differential pairs, DiffPair bundles, protocol constraints for PCIe, USB, DisplayPort, RGMII, Ethernet, DDR, pin models, reference planes, length matching, impedance-controlled routing, or SignalConstraint definitions. Covers TopologyNet, Constrain, ConstrainDiffPair, ConstrainReferenceDifference, DiffPairConstraint, ReferencePlanes, and protocol-specific constraint patterns.
Mechanical CAD interface for JITX designs. Use when the user asks to import DXF, EMN, IDF, IDX, or BDF mechanical data; set a board outline from mechanical CAD; export a JITX board to DXF; attach STEP models; or work with mechanical CAD data. Also covers how to export a full board STEP (UI-only in py-jitx 4.2.x — there is no CLI).
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JITX hardware design automation skills for both Claude Code and Codex/GPT. The repo uses one shared skills/ tree and platform-specific plugin manifests for each agent runtime.
Install from the Claude marketplace:
/plugin marketplace add JITx-Inc/jitx-skills
/plugin install jitx-skills@jitx
For local development without installing from a marketplace:
claude --plugin-dir /absolute/path/to/jitx-skills
Claude plugin skills are namespaced. For example, invoke the base workflow with /jitx-skills:jitx.
Codex uses .codex-plugin/plugin.json and the shared skills/ directory. The repo ships its Codex marketplace at .agents/plugins/marketplace.json, so the repo itself is a marketplace named jitx.
This GitHub marketplace layout requires Codex CLI 0.142.0 or newer.
Install from GitHub:
codex plugin marketplace add JITx-Inc/jitx-skills
codex plugin add jitx-skills@jitx
For local development, point the marketplace at a checkout instead:
codex plugin marketplace add /absolute/path/to/jitx-skills
codex plugin add jitx-skills@jitx
Codex skills can be invoked explicitly with $jitx, $jitx-component-modeler, and the other skill names, or selected implicitly from the user request.
Claude Code:
/plugin marketplace update jitx
claude plugin update jitx-skills@jitx
Restart Claude Code or run /reload-plugins after local plugin edits. If you previously added this marketplace under the old jitx-skills name, migrate it with:
/plugin marketplace remove jitx-skills
/plugin marketplace add JITx-Inc/jitx-skills
/plugin install jitx-skills@jitx
Codex/GPT:
codex plugin marketplace upgrade jitx
codex plugin add jitx-skills@jitx
For local-path marketplaces, update the checkout instead of running marketplace upgrade (it only refreshes Git snapshots). Then start a new thread so Codex reloads the skill list and manifest metadata.
Base workflow skill for JITX projects. Triggers on JITX-related tasks and provides environment setup, build commands, project structure guidance, and navigation to specialized skills.
Example triggers:
Generate JITX Python component code from datasheets, KiCad footprints, or user specifications.
Example triggers:
Build JITX circuits with wiring, passives, power connections, application circuits, placement, and basic copper geometry.
Example triggers:
Model JITX substrates: stackups, materials, vias, routing structures, fabrication constraints, and design rules.
Example triggers:
Author PCB physical layout from code: copper, custom shapes, pad features, explicit placement, vias, code-based routes, and layout-intent tags.
Example triggers:
Apply signal-integrity constraints to JITX designs: topologies, insertion loss, timing, differential pairs, bus matching, pin models, and protocol constraints.
Example triggers:
Model flexible pin mapping with provide/require patterns, pin muxing, P/N swap, lane ordering, byte/bit swapping, and topology constraints on assigned ports.
Example triggers:
Same-model self-critique pass on JITX Python code just written in the current workspace. Catches architectural failure modes that grep gates and static linters miss.
Example triggers:
Mechanical CAD interface for JITX designs: inspect/import DXF, EMN, IDF, IDX, and BDF data; export DXF; attach STEP models; export a full board STEP via the JITX UI (no CLI in py-jitx 4.2.x).
Example triggers:
npx claudepluginhub jitx-inc/jitx-skills --plugin jitx-skillsAgentic KiCad PCB design workflow using SKiDL — architect, source, code, and verify circuits with AI agents.
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EasyEDA MCP Pro plugin for EasyEDA Pro project workflow automation, schematic/PCB inspection, BOM and sourcing, DRC/ERC validation, and manufacturing exports.
Skill for reading and parsing electronic component datasheets, extracting specifications and technical information.