jitx

JITX Skills

Claude Code skills for JITX hardware design automation. These skills help Claude work effectively with JITX Python projects for PCB design, circuit creation, and component modeling.

Installation

Inside Claude Code, run these slash commands:

/plugin marketplace add JITx-Inc/jitx-skills
/plugin install jitx-skills@jitx

Updating

Manual Update

To pull the latest version of the plugin:

/plugin marketplace update jitx
claude plugin update jitx-skills@jitx

The first command refreshes the marketplace listing from the GitHub repository. The second command updates the installed plugin to the latest version. Restart Claude Code after updating to load the new version.

Automatic Updates

By default, auto-update is disabled for third-party marketplaces. To enable it:

1. Run /plugin to open the interactive plugin manager
2. Select the Marketplaces tab
3. Choose jitx
4. Select Enable auto-update

When enabled, Claude Code checks for updates at startup and notifies you to restart if updates were applied.

Uninstalling

claude plugin uninstall jitx-skills@jitx

Skills

jitx (Base Skill)

Base workflow skill for JITX projects. Triggers on any JITX-related task and provides:

• Automatic environment setup (venv creation, dependency installation)
• Build commands for designs
• Project structure guidance
• Navigation to specialized subskills

Example triggers:

• "Build my JITX design"
• "Set up JITX environment"
• "Create a circuit for..."

jitx-component-modeler

Generate JITX Python component code from datasheets. Supports:

• Package types: BGA, QFN, SOIC, SON, SOT
• Features: Multi-unit symbols, thermal pads, complex pin mappings
• Batch creation: Organized component folder structure

Example triggers:

• "Create a JITX component from this datasheet"
• "Model the RP2040 for my project"
• "Add an LDO component from the TI datasheet"

jitx-circuit-builder

Build JITX circuits with wiring, passives, providers, and geometry. Covers:

• Circuit class: Net wiring, passive insertion, component instantiation
• Provider/require: Pin assignment patterns for flexible designs
• Geometry: Pours, copper shapes, placement
• Solvers: Voltage divider, query refinement

Example triggers:

• "Wire up a buck converter circuit"
• "Connect the MCU to sensors over I2C"
• "Add decoupling caps to all power pins"

jitx-substrate-modeler

Model JITX substrates — stackups, materials, vias, routing structures, and fabrication constraints. Covers:

• Stackups: Symmetric and explicit layer definitions, material properties
• Vias: All types — through-hole, laser micro, stacked, blind, buried, backdrilled
• Routing structures: Single-ended and differential with NeckDown, via fencing, geometry, reference planes
• Fabrication constraints: Manufacturing rules for any fab house
• Design rules: Tag-based clearance and trace width constraints

Example triggers:

• "Create a 4-layer JLCPCB substrate"
• "Define a 14-layer RF stackup with via fencing"
• "Set up 100-ohm differential routing structure"
• "Add laser microvias to the substrate"

jitx-interconnect-constraints

Apply signal integrity constraints to JITX designs. Covers:

• Topology: >> operator for SI-aware signal routing vs + for nets
• Constraints: Insertion loss, timing, routing structure assignment
• Differential pairs: ConstrainDiffPair, DiffPairConstraint reusable helper
• Bus matching: ConstrainReferenceDifference for clock-to-data skew
• Pin models: TerminatingPinModel, BridgingPinModel for SI analysis
• Protocols: PCIe, SATA, SFP, Ethernet, RGMII, DDR4, LPDDR4/5, GDDR7

Example triggers:

• "Constrain this differential pair with 5ps skew"
• "Add insertion loss limits to the data bus"
• "Match data signals to the clock within 20ps"
• "Set up PCIe Gen4 constraints"

Project Structure

jitx-skills/
├── jitx/                      # Base JITX workflow skill
│   ├── SKILL.md
│   └── references/
│       └── docs-index.md      # JITX documentation URL index
├── jitx-component-modeler/    # Component generation skill
│   ├── SKILL.md
│   ├── references/
│   │   └── package-examples.md  # Package-specific code examples
│   └── scripts/
│       └── extract_pages.py   # PDF extraction utility
├── jitx-circuit-builder/      # Circuit building skill
│   ├── SKILL.md
│   └── references/
│       └── advanced-patterns.md  # Provider, pour, placement patterns
├── jitx-substrate-modeler/    # Substrate modeling skill
│   └── SKILL.md
├── jitx-interconnect-constraints/  # SI constraints skill
│   ├── SKILL.md
│   └── references/
│       └── protocol-standards.md  # Protocol timing parameters
└── .claude-plugin/
    └── marketplace.json

Requirements

• A JITX Python project (with pyproject.toml containing jitx dependency)
• Python 3.10+
• For datasheet processing: pip install pymupdf