From gateflow
Generates scaffolds for hardware protocols (AXI4-Lite, SPI, UART, I2C, AXI4-Full, AXI-Stream, Wishbone) with testbench templates and integration examples. Useful for requests like 'create I2C master interface' or 'scaffold AXI-Stream source'.
npx claudepluginhub codejunkie99/gateflow-plugin --plugin gateflowThis skill is limited to using the following tools:
Not production IP cores. Correct, readable scaffolds that engineers customize.
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Not production IP cores. Correct, readable scaffolds that engineers customize. Plus the testbenches and integration code — that's where the real time goes.
| Protocol | Priority | Scaffold Includes |
|---|---|---|
| AXI4-Lite | 1 | Slave register interface + master BFM + TB |
| SPI | 2 | Master + slave + loopback TB |
| UART | 3 | TX + RX + loopback TB |
| I2C | 4 | Master + slave model + TB |
| AXI4-Full | 5 | Slave + burst master BFM + TB |
| AXI-Stream | 6 | Source + sink + passthrough + TB |
| Wishbone | 7 | Slave + master + TB |
When user requests a protocol interface:
/gf-ip list)/gf-ip add <block> insteadEach scaffold includes:
Detailed protocol specifications are in references/:
references/axi4-lite.md — AXI4-Lite signal list, timing, rulesreferences/spi.md — SPI modes, timing, signal descriptionsreferences/i2c.md — I2C protocol, addressing, clock stretchingWhen generating scaffolds, ALWAYS read the reference first for correct signal names, widths, and timing requirements.