{"name":"vibeic-vibe-ic-vibe-ic-marketplace-plugins-vibe-ic","owner":{"name":"ClaudePluginHub"},"plugins":[{"name":"vibeic-vibe-ic-vibe-ic-marketplace-plugins-vibe-ic","source":{"source":"git-subdir","url":"https://github.com/vibeic/vibe-ic","path":"vibe-ic-marketplace/plugins/vibe-ic"},"description":"AI-Native IC Design plugin for Claude Code — one install bundles and auto-registers the MCP-EDA server that wraps the open-source EDA toolchain and lab hardware. Two entry points into one Phase 1: (A) natural-language prompt/dialogue, or (B) existing design docs → layered design JSON (L-docs). Phase 2: RTL → lint → sim → formal → FPGA SOF + on-board test. Phase 3: synth → STA → DFT → PnR → DRC/LVS → GDS → tapeout. Analog A1-A9 (sizing → layout → hardmacro) and Mixed-signal M1-M4 (merge → AMS co-sim → PV) interleaved per phase. Strict canonical-flow compliance gate plus an anti-fabrication doctrine enforced as deterministic gates (provenance audit-chain, chip-AGNOSTIC source guard, real-artifact + SHA256 attestation, gate self-assertion, benchmark-path consistency) — no fabrication, no hallucinated PASS.","version":"1.5.44","strict":true,"keywords":["ic-design","asic","verilog","systemverilog","eda","gf180","sky130","vibe-coding","agent","phase-1-dialogue","canonical-flow","hardware-proven"],"category":"development"}]}